EDFAS - Lone Star Chapter

The increased complexity of integrated circuit packaging has made
preparation of advanced devices for circuit editing and failure analysis
more challenging than ever. Pure mechanical methods which have worked for
years significantly risk introducing defects in devices that are under
stress. Thinner substrates, smaller die, and many more package material
layers, including stacked die, have also made accessing internal sites
difficult because devices are no longer flat or of uniform thickness.
Recent advances in laser assisted chemical processing has enabled low
stress methods for preparing these most difficult devices by locally
micromachining the silicon die, preserving the mechanical, electrical and
thermal characteristics of the device. In turn, laser-based metrology
specifically designed to measure thick layers (1 – 1000 um) has allowed the
measurement of stacks of package materials especially full thickness and
thin silicon die.

Brief Bio:
Mr. Scott Silverman is President and founder of Varioscale, Inc.  Mr.
Silverman has over 20 years of experience in the field of semiconductors
including laser processing, electron beam and x-ray lithography, and
microwave device research. Previously, Mr. Silverman was COO of Revise,
Inc. and has conducted research at MIT, Cambridge MA and Varian Research
Center, Palo Alto, CA.

The need for obsolete parts to support military depot and repair activity
combined with less than optimal supplier selection resulted in counterfeit
problems for Raytheon North Texas.  These problems became apparent in 2002
and an immediate response was needed.  Although processes were developed
with little input from industry at large, Raytheon North Texas developed a
counterfeit risk mitigation process that is very similar to processes
developed elsewhere.  This discussion will cover the development of the
Raytheon North Texas counterfeit risk mitigation process, how it evolved as
we identified new concerns, ways in which our process may be unique, and
the things we ultimately learned from other groups.  Finally we will
include examples of interesting failures and summary of screening.

Brief Bio:
Mr.James Izzo is a Senior Technical Support Specialist with Honors at
Raytheon Company.   Mr.
Izzo has over 25 years of experience in the field of semiconductors
including automated test, bench test and failure analysis. He was a primary
contributor to implementation of the North Texas counterfeit risk
mitigation process.

Electron BackScatter Diffraction (EBSD) is a powerful, versatile SEM-based technique that is rapidly growing in popularity for materials characterization of metals, ceramics and geological materials.  The technique uses Kikuchi diffraction patterns generated from damage free, usually polished, surfaces of bulk samples using the SEM’s focused electron probe.  Patterns emanating from the surface are automatically analyzed for phase and crystallographic orientation by comparison with simulated patterns generated from potential match phases.  In EBSD phase identification, chemistry collected by an integrated EDS system at points of interest are used to cull possible match phases from crystallographic phase databases, followed by indexing against those phases using simultaneously collected Kikuchi patterns, to arrive at solutions based on both chemistry and crystallography.  In EBSD mapping, points over a designed grid are automatically visited by the electron beam, diffraction patterns collected and indexed, and (optionally) EDS data simultaneously collected.  Data collection rates on modern EBSD systems can be up to hundreds of points per second, allowing characterization of relatively large sample areas at high resolutions, SEM conditions and materials dependent.  Raw data thus collected may be analyzed for quantitative and visual analysis (via EBSD maps) of grain size and shape, phase distribution and area %, grain boundary position and character (e.g., low angle, high angle, twin/special boundary), crystallographic texture/preferred orientation, strain, and other modes of analysis.  Point analysis of non-polished materials are also possible, for phase and orientation determinations in nanowires and nanostructures, particles and fracture surfaces.  Recent advances in the technique include 3-D EBSD on FIB-SEMs, high speed data acquisition, high sensitivity strain analysis and ultra-high topographic imaging using the forescatter electron detectors, which are used commonly used in conjunction with EBSD detectors.

Bio: 
Scott Sitzman is the primary Electron BackScatter Diffraction (EBSD) Applications Scientist in North America for Oxford Instruments, for both geology and materials science.  He holds a B.S. in geology from the University of California – Santa Barbara, and a M.S. in geology with a minor in materials science from the University of Wisconsin – Madison.  His graduate work focused on TEM analysis of defect microstructures in a naturally occurring iron oxide (magnetite) with implications for rheology, magnetic susceptibility and oxygen isotope diffusional heterogeneity.  Pursuing materials science after his masters in geology, Scott went on to work as an EBSD specialist at General Electric’s Global Research Center in upstate New York for four years, primarily analyzing aircraft engine titanium alloys and nickel-base superalloys, with work also in ceramics and metal-ceramic in situ composites.  Subsequently, he followed a colleague from GE to take a position as Staff Scientist for a small aerospace titanium foundry near his native Los Angeles, then in 2002 returned to EBSD as staff scientist for HKL Technology, Inc., the supplier of the EBSD system he used at GE, since acquired by Oxford Instruments.  In addition to his applications work, Scott is involved in collaborative research efforts in semiconductor nanowire research/characterization with UCLA and Northrop Grumman.

Computed tomography (CT) is the preferred way for 3-dimensional analysis of complex electronic assemblies. Microfocus CT X-Ray systems offer high resolution and advanced detail detectability, yet have suffered from major limitations in terms of speed and throughput, resulting in low ROI and slow adoption by the manufacturing, QC and F/A users. This presentation demonstrates how µCT can simplify the inspection process of die, packaging, completed assemblies and identifies recent advancements that extend CT-applicability from specialized needs to a quick turn solution.

Brief Bio: 
Sheri Martin is a Sales Manager working at YXLON FeinFocus, as the Electronics and Medical Device Market specialist.  Since 1986 she has been involved in the electronics manufacturing industry including roles at Quad Systems (SMT screen print, dispense, pick & place + reflow), Palomar Technologies (die bond, wire bond, wedge bond, + active photonic alignment), and currently YXLON FeinFocus in a sales and marketing role for the microfocus X-Ray division. 
Sheri’s main duties have included process development, reliability and yield improvement as well as cost reduction. 
Sheri lives in Atlanta, GA with her two cats Tipper and Angel.  When not working she likes to swim and garden. She is a member of the Porsche club of America and a car enthusiast!   You can reach her at:  YXLON FeinFocus emial:  Sheri.martin@yxlon.com

Printed wiring boards (PWBs) are found throughout Raytheon products, from small subassemblies to large motherboards.  The complexity continues to increase with the demands for higher density, increased layer count, improved mechanical properties, and higher frequency capabilities.
 
Various pitfalls await as new and improved materials and processes spawn new mechanisms for failure.  In-process screening effectively reduces the amount of failed product resulting from manufacturing defects, but insidious latent defects may remain.  This presentation summarizes two failure investigations of fully populated, i.e. very expensive, assemblies.

Joseph Colangelo is a Principal Engineer for Raytheon NCS, in the McKinney Failure Analysis Lab, having joined the lab in 1988.  Prior to that he was responsible for developing custom circuit and packaging solutions for high-density power supplies.  He has expertise in various aspects of failure investigation and analysis techniques.  He has published and presented on many topics in failure analysis, and advanced techniques using real-time radiography.  He holds a BSEE, with Honors, from Worcester Polytechnic Institute.